| 1394 LLC |
| 5x4Gbps CRC generator designed with standard cells |
| 8 bit Microcontroller |
| 8 bit Microprocessor |
| 804Arm cores |
| Adaptive Filter design |
| ADPCM |
| Arm core |
| Basic DES Crypto Core |
| Basic RSA Encryption Engine |
| CISC processor design |
| Cordic Core |
| CPU Generator |
| Cryptographic communication |
| Cryptographic controller design |
| Debit card |
| DES Algorithm design |
| Designing an active noise control system using DSP and VLSI |
| DMT Transceiver |
| E1 Framer/Deframer |
| Electronic voting machine |
| FIR & IIR filter designing |
| First File Reader FAT16 |
| Fuzzy controller design |
| Fuzzy Logic Hardware Accelerator |
| HDB3/B3ZS Encoder, Decoder |
| Home appliances control designing |
| I2C controller core |
| Identity card designing |
| Image processing |
| ISA bus design |
| JOP: a Java Optimized Processor |
| Linear Predictive Coding |
| Minima's |
| Motion Detection from Image Sequences Using a New Fully Digital VLSI |
| MP3 decoder |
| Neural Architecture PID controller |
| Object counter designing |
| PCI bus design |
| Plasma - most MIPS I(TM) Epodes |
| Quadrature Decoder / Counter |
| Railway barrier monitor |
| RISC coprocessor designing |
| RISC5x |
| RSA Algorithm design |
| Security system |
| Single Clock Unsigned Division Algorithm |
| SISC Processor design |
| Smart card designing |
| SPDIF Interface |
| Spectrum analyzer |
| Stepper Motor Controller |
| Stepper motor controlling |
| System680 |
| System6805 |
| System6811 |
| Traffic light controller |
| UART designing |
| Vending machine |
| Wireless attendance recorder cum security system |
| WISHBONE Builder |
| Wishbone System6800/01 |
